1. Field of the Invention
This invention relates to computer memory arrays, and more particularly, to methods and apparatus for storing data in a memory array organized on a column and row basis in order to preserve the integrity of the data.
2. History of the Prior Art
Modern computer systems make extensive use of long term memory. Typically this memory is provided by one or more hard (fixed) disk drives. A hard disk drive is an electro-mechanical device which includes one or more flat circular disks fixed to rotate rapidly about a central axis. Each flat disk has opposite surfaces which are coated with some form of magnetic material. A mechanical arm driven by electrical signals places a magnetic head over each side of each disk to write to positions on the disk or to read from those positions. These positions lie in sectors, a number of which (e.g., seventeen) form one complete track on one side of a disk. Each sector is capable of storing a fixed number of bytes of data (typically 512 bytes). Depending on formatting, a single side of a disk may have over six hundred tracks. A typical electro-mechanical hard disk drive used in personal computers today is capable of storing forty megabytes of data.
Such hard disk drives are very useful and have become almost a necessity to the operation of personal computers. However, such electro-mechanical drives do have their drawbacks. They are relatively heavy and increase the weight of a computer, especially a portable computer, significantly. More importantly, electro-mechanical hard disk drives are very susceptible to shock. An electro-mechanical hard disk drive which is dropped is quite likely to cease functioning with a catastrophic loss of data.
Recently, forms of long term storage other than electro-mechanical hard disk drives have become feasible for use in computers. One of these is the flash electrically-erasable programmable read only memory (flash EEPROM) array. A flash EEPROM array is comprised of a large plurality of floating-gate field effect transistors arranged as memory cells in typical row and column fashion with circuitry for accessing the individual cells and placing the memory transistors of those cells in one of two memory conditions. A flash memory cell, like a typical EEPROM cell but in contrast to DRAM memory, retains information when power is removed. A flash EEPROM array has a number of characteristics which adapt it to use as long term memory. It is light in weight and occupies very little space. More importantly, it is especially rugged. It will withstand without adverse effects repeated drops each of which would destroy a typical electro-mechanical hard disk drive.
A difficulty with flash EEPROM, however, is that it is not reprogrammable until it has been erased, and the method by which this is accomplished requires that all of the transistors (cells) used in the memory be erased together by applying a high voltage simultaneously to the source terminals of all of the transistors in the memory array (or an electrically-isolated portion thereof). Although this is a very slow process, it has been found that a flash EEPROM array may be used for long term storage where data is rapidly changing by physically separating the flash array during chip layout into smaller groups (blocks) of cells which may be erased together. To reduce the need for erasure of the blocks, data is written to an empty position in any logical block of the flash memory array which has space available no matter what the sector address of the data or the physical address on the block. A lookup table is kept which records the physical position on the block of the logical sector address. This arrangement allows a first block to be written sector by sector, a second block to be written in the same sequential manner, and so on. When the data in a sector changes so that the sector needs to be rewritten, the data is written to a new physical position, the data in the lookup table is changed to record the new physical position against the logical sector number, and the first position at which the data was written is marked as dirty so that an attempt to read that physical position produces an error signal. After some period of time, a sufficient number of blocks will be filled that it will be desirable to release space by moving the valid information from some especially dirty block to some other block and erasing the entire block from which the valid information has been read. This array architecture reduces the amount of erasure necessary and allows a flash EEPROM array to function even faster than an electro-mechanical hard disk drive.
The details of the new arrangement are disclosed is U.S. patent application Ser. No. 07/969,131, entitled A Method and Circuitry For A Solid State Memory Disk, S. Wells, filed Oct. 31, 1992, and assigned to the assignee of the present invention. An especial advantage of the arrangement is that it allows the erasure of blocks to occur in the background when the facilities of the array are not otherwise occupied with reading and writing. In this manner, the external host which is writing to and receiving information from the flash array is typically not aware that an erasure is taking place even though the erasure requires one or two seconds. Another advantage of the arrangement is that the individual blocks of flash memory store sectors which may be of any size rather than the fixed size sectors stored by electro-mechanical hard disks. This cuts down substantially the amount of addressing required and essentially eliminates the lost space typical of hard and floppy disks with their fixed size sectors because each individual sector of data placed on a block of flash memory need only be as long as the data it stores.
However, an electro-mechanical hard disk drive memory offers certain advantages even though it has its drawbacks. For example, an electro-mechanical hard disk drive is typically able to utilize various error checking and correcting schemes which allow different types of errors to be corrected by storing certain error checking information with the data. However, an electro-mechanical hard disk drive is organized to read and write data serially in circular tracks of decreasing sizes surrounding a center. The row and column organization of flash memory does not lend itself to immediate use of such schemes. It is, therefore, desirable to provide new arrangements by which various error correcting schemes may be implemented to the greatest advantage.
Moreover, flash memory is subject to failures caused the methods by which it is addressed. More particularly, access to a block of flash EEPROM is provided by conductors (wordlines) which connect to all of the memory cells in a row and other conductors (bitlines) which connect to all of the memory cells in a column. Thus, failures in flash EEPROM may effect an entire row or an entire column of memory cells. It is also desirable to provide addressing arrangements by which the least amount of data will be lost in any given failure peculiar to the arrangement of flash EEPROM.